HAL CEC constants migration ¶

This section provides information about the HAL CEC constants migration.

HAL CEC Signal Free Time constants ¶

HAL1	HAL2
#define CEC_DEFAULT_SFT #define CEC_0_5_BITPERIOD_SFT #define CEC_1_5_BITPERIOD_SFT #define CEC_2_5_BITPERIOD_SFT #define CEC_3_5_BITPERIOD_SFT #define CEC_4_5_BITPERIOD_SFT #define CEC_5_5_BITPERIOD_SFT #define CEC_6_5_BITPERIOD_SFT	typedef enum { HAL_CEC_SIG_FREETIME_DURATION_AUTO, HAL_CEC_SIG_FREETIME_DURATION_0_5_BIT_PERIOD, HAL_CEC_SIG_FREETIME_DURATION_1_5_BIT_PERIOD, HAL_CEC_SIG_FREETIME_DURATION_2_5_BIT_PERIOD, HAL_CEC_SIG_FREETIME_DURATION_3_5_BIT_PERIOD, HAL_CEC_SIG_FREETIME_DURATION_4_5_BIT_PERIOD, HAL_CEC_SIG_FREETIME_DURATION_5_5_BIT_PERIOD, HAL_CEC_SIG_FREETIME_DURATION_6_5_BIT_PERIOD } hal_cec_sig_freetime_duration_t;

HAL1

HAL2

                #define CEC_DEFAULT_SFT
#define CEC_0_5_BITPERIOD_SFT
#define CEC_1_5_BITPERIOD_SFT
#define CEC_2_5_BITPERIOD_SFT
#define CEC_3_5_BITPERIOD_SFT
#define CEC_4_5_BITPERIOD_SFT
#define CEC_5_5_BITPERIOD_SFT
#define CEC_6_5_BITPERIOD_SFT

               

                typedef enum
{

  HAL_CEC_SIG_FREETIME_DURATION_AUTO,
  HAL_CEC_SIG_FREETIME_DURATION_0_5_BIT_PERIOD,
  HAL_CEC_SIG_FREETIME_DURATION_1_5_BIT_PERIOD,
  HAL_CEC_SIG_FREETIME_DURATION_2_5_BIT_PERIOD,
  HAL_CEC_SIG_FREETIME_DURATION_3_5_BIT_PERIOD,
  HAL_CEC_SIG_FREETIME_DURATION_4_5_BIT_PERIOD,
  HAL_CEC_SIG_FREETIME_DURATION_5_5_BIT_PERIOD,
  HAL_CEC_SIG_FREETIME_DURATION_6_5_BIT_PERIOD
} hal_cec_sig_freetime_duration_t;

               

Related concept:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.

HAL CEC bit rising error bits constants ¶

HAL1	HAL2
#define CEC_BRE_ERRORBIT_GENERATION #define CEC_BRE_ERRORBIT_NO_GENERATION	These constants have been removed from HAL2, use the following APIs instead: HAL_CEC_EnableBitRisingErrGen() HAL_CEC_DisableBitRisingErrGen()

Related concept:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.

HAL CEC broadcast error codes constants ¶

HAL1	HAL2
#define CEC_BROADCASTERROR_ERRORBIT_GENERATION #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION	These constants have been removed from HAL2, use the following APIs instead: HAL_CEC_EnableBroadcastErrGen() HAL_CEC_DisableBroadcastErrGen()

Related concept:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.

HAL CEC Device Own Address position constants ¶

HAL1	HAL2
#define CEC_CFGR_OAR_LSB_POS	This constants is used internally and does not affect user-level operations at the HAL level.

Note

In HAL1 CEC_CFGR_OAR_LSB_POS used to set the OAR value in a macro. To set or clear OAR, refer to HAL CEC clear OAR macro and HAL CEC set OAR macro.

Related concept:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.

HAL CEC Receiver Tolerance constants ¶

HAL1	HAL2
#define CEC_EXTENDED_TOLERANCE #define CEC_STANDARD_TOLERANCE	typedef enum { HAL_CEC_RX_TOLERANCE_EXTENDED, HAL_CEC_RX_TOLERANCE_STANDARD } hal_cec_rx_tolerance_t;

Related concept:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.

HAL CEC status flags constants ¶

HAL1	HAL2
#define CEC_FLAG_ARBLST #define CEC_FLAG_BRE #define CEC_FLAG_LBPE #define CEC_FLAG_RXACKE #define CEC_FLAG_RXBR #define CEC_FLAG_RXEND #define CEC_FLAG_RXOVR #define CEC_FLAG_SBPE #define CEC_FLAG_TXACKE #define CEC_FLAG_TXBR #define CEC_FLAG_TXEND #define CEC_FLAG_TXERR #define CEC_FLAG_TXUDR	#define HAL_CEC_ERROR_TX_ARBITRATION_LOST #define HAL_CEC_ERROR_RX_BIT_RISING #define HAL_CEC_ERROR_RX_LONG_BIT_PERIOD #define HAL_CEC_ERROR_RX_MISSING_ACK /* This define is used internally and do not impact user-level operations at HAL level. / / This define is used internally and do not impact user-level operations at HAL level. / #define HAL_CEC_ERROR_RX_OVERRUN #define HAL_CEC_ERROR_RX_SHORT_BIT_PERIOD #define HAL_CEC_ERROR_TX_MISSING_ACK / This define is used internally and do not impact user-level operations at HAL level. / / This define is used internally and do not impact user-level operations at HAL level. / #define HAL_CEC_ERROR_TX #define HAL_CEC_ERROR_TX_UNDERRUN #define HAL_CEC_ERROR_RX_OVERFLOW / New error code */

HAL1

HAL2

                #define CEC_FLAG_ARBLST
#define CEC_FLAG_BRE
#define CEC_FLAG_LBPE
#define CEC_FLAG_RXACKE

#define CEC_FLAG_RXBR
#define CEC_FLAG_RXEND

#define CEC_FLAG_RXOVR
#define CEC_FLAG_SBPE
#define CEC_FLAG_TXACKE

#define CEC_FLAG_TXBR
#define CEC_FLAG_TXEND

#define CEC_FLAG_TXERR
#define CEC_FLAG_TXUDR

               

                #define HAL_CEC_ERROR_TX_ARBITRATION_LOST
#define HAL_CEC_ERROR_RX_BIT_RISING
#define HAL_CEC_ERROR_RX_LONG_BIT_PERIOD
#define HAL_CEC_ERROR_RX_MISSING_ACK

/* This define is used internally and do not impact user-level operations at HAL level. */
/* This define is used internally and do not impact user-level operations at HAL level. */

#define HAL_CEC_ERROR_RX_OVERRUN
#define HAL_CEC_ERROR_RX_SHORT_BIT_PERIOD
#define HAL_CEC_ERROR_TX_MISSING_ACK

/* This define is used internally and do not impact user-level operations at HAL level. */
/* This define is used internally and do not impact user-level operations at HAL level. */

#define HAL_CEC_ERROR_TX
#define HAL_CEC_ERROR_TX_UNDERRUN

#define HAL_CEC_ERROR_RX_OVERFLOW /* New error code */

               

Related concept:

Revised and optimized HAL error management

HAL CEC listening mode types constants ¶

HAL1	HAL2
#define CEC_FULL_LISTENING_MODE #define CEC_REDUCED_LISTENING_MODE	typedef enum { HAL_CEC_LISTEN_MODE_RECEIVE_ALL_MSG, HAL_CEC_LISTEN_MODE_RECEIVE_OWN_ADDRESS_ONLY } hal_cec_listen_mode_t;

Related concept:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.

HAL CEC interrupt enable register bits constants ¶

HAL1	HAL2
#define CEC_IER_RX_ALL_ERR #define CEC_IER_TX_ALL_ERR	In HAL1, those defines have been used by the `__HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__)` and `__HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__)` macros. In HAL2, the IT defines statements and macros are removed, use `LL_CEC_EnableIT()` and `LL_CEC_DisableIT()` instead.

HAL1

HAL2

                #define CEC_IER_RX_ALL_ERR
#define CEC_IER_TX_ALL_ERR

In HAL1, those defines have been used by the __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) and __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) macros.

In HAL2, the IT defines statements and macros are removed, use LL_CEC_EnableIT() and LL_CEC_DisableIT() instead.

Related concept:

Removal of hardware-related macros in HAL2

HAL CEC initiator least significant bit position constants ¶

HAL1	HAL2
#define CEC_INITIATOR_LSB_POS	This definition is used internally and does not affect user-level operations at the HAL level.

Related concept:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.

HAL CEC interrupt status register bits constants ¶

HAL1	HAL2
#define CEC_ISR_ALL_ERROR	In HAL1, those defines have been used by the `__HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__)` and `__HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__)` macros. In HAL2, the IT flags and macros are removed, use `LL_CEC_CLEAR_ISR_FLAG()` and `LL_CEC_IsStatusFlag()` instead.

HAL1

HAL2

#define CEC_ISR_ALL_ERROR

In HAL1, those defines have been used by the __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) and __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) macros.

In HAL2, the IT flags and macros are removed, use LL_CEC_CLEAR_ISR_FLAG() and LL_CEC_IsStatusFlag() instead.

Related concept:

HAL CEC interrupt identifiers constants ¶

HAL1	HAL2
#define CEC_IT_ARBLST #define CEC_IT_BRE #define CEC_IT_LBPE #define CEC_IT_RXACKE #define CEC_IT_RXBR #define CEC_IT_RXEND #define CEC_IT_RXOVR #define CEC_IT_SBPE #define CEC_IT_TXACKE #define CEC_IT_TXBR #define CEC_IT_TXEND #define CEC_IT_TXERR #define CEC_IT_TXUDR	Removed; use the LL defines instead: #define LL_CEC_IT_ARBLSTIE #define LL_CEC_IT_BREIE #define LL_CEC_IT_LBPEIE #define LL_CEC_IT_RXACKIE #define LL_CEC_IT_RXBRIE #define LL_CEC_IT_RXENDIE #define LL_CEC_IT_RXOVRIE #define LL_CEC_IT_SBPEIE #define LL_CEC_IT_TXACKIE #define LL_CEC_IT_TXBRIE #define LL_CEC_IT_TXENDIE #define LL_CEC_IT_TXERRIE #define LL_CEC_IT_TXUDRIE

HAL1

HAL2

                #define CEC_IT_ARBLST
#define CEC_IT_BRE
#define CEC_IT_LBPE
#define CEC_IT_RXACKE
#define CEC_IT_RXBR
#define CEC_IT_RXEND
#define CEC_IT_RXOVR
#define CEC_IT_SBPE
#define CEC_IT_TXACKE
#define CEC_IT_TXBR
#define CEC_IT_TXEND
#define CEC_IT_TXERR
#define CEC_IT_TXUDR

               

Removed; use the LL defines instead:

                #define LL_CEC_IT_ARBLSTIE
#define LL_CEC_IT_BREIE
#define LL_CEC_IT_LBPEIE
#define LL_CEC_IT_RXACKIE
#define LL_CEC_IT_RXBRIE
#define LL_CEC_IT_RXENDIE
#define LL_CEC_IT_RXOVRIE
#define LL_CEC_IT_SBPEIE
#define LL_CEC_IT_TXACKIE
#define LL_CEC_IT_TXBRIE
#define LL_CEC_IT_TXENDIE
#define LL_CEC_IT_TXERRIE
#define LL_CEC_IT_TXUDRIE

               

Related concept:

Removal of hardware-related macros in HAL2

HAL CEC line bit period error bits constants ¶

HAL1	HAL2
#define CEC_LBPE_ERRORBIT_GENERATION #define CEC_LBPE_ERRORBIT_NO_GENERATION	These constants have been removed from HAL2, use the following APIs instead: HAL_CEC_EnableLongBitPeriodErrGen() HAL_CEC_DisableLongBitPeriodErrGen()

Related concept:

HAL CEC RX stop on bit rising error options constants ¶

HAL1	HAL2
#define CEC_RX_STOP_ON_BRE #define CEC_NO_RX_STOP_ON_BRE	These constants have been removed from HAL2, use the following APIs instead: HAL_CEC_EnableRxStopUponBitRisingErr() HAL_CEC_DisableRxStopUponBitRisingErr()

Related concept:

HAL CEC own address definitions constants ¶

HAL1	HAL2
#define CEC_OWN_ADDRESS_NONE #define CEC_OWN_ADDRESS_0 #define CEC_OWN_ADDRESS_1 #define CEC_OWN_ADDRESS_2 #define CEC_OWN_ADDRESS_3 #define CEC_OWN_ADDRESS_4 #define CEC_OWN_ADDRESS_5 #define CEC_OWN_ADDRESS_6 #define CEC_OWN_ADDRESS_7 #define CEC_OWN_ADDRESS_8 #define CEC_OWN_ADDRESS_9 #define CEC_OWN_ADDRESS_10 #define CEC_OWN_ADDRESS_11 #define CEC_OWN_ADDRESS_12 #define CEC_OWN_ADDRESS_13 #define CEC_OWN_ADDRESS_14	#define HAL_CEC_OWN_ADDR_NONE #define HAL_CEC_OWN_ADDR_0 #define HAL_CEC_OWN_ADDR_1 #define HAL_CEC_OWN_ADDR_2 #define HAL_CEC_OWN_ADDR_3 #define HAL_CEC_OWN_ADDR_4 #define HAL_CEC_OWN_ADDR_5 #define HAL_CEC_OWN_ADDR_6 #define HAL_CEC_OWN_ADDR_7 #define HAL_CEC_OWN_ADDR_8 #define HAL_CEC_OWN_ADDR_9 #define HAL_CEC_OWN_ADDR_10 #define HAL_CEC_OWN_ADDR_11 #define HAL_CEC_OWN_ADDR_12 #define HAL_CEC_OWN_ADDR_13 #define HAL_CEC_OWN_ADDR_14

HAL1

HAL2

                #define CEC_OWN_ADDRESS_NONE
#define CEC_OWN_ADDRESS_0
#define CEC_OWN_ADDRESS_1
#define CEC_OWN_ADDRESS_2
#define CEC_OWN_ADDRESS_3
#define CEC_OWN_ADDRESS_4
#define CEC_OWN_ADDRESS_5
#define CEC_OWN_ADDRESS_6
#define CEC_OWN_ADDRESS_7
#define CEC_OWN_ADDRESS_8
#define CEC_OWN_ADDRESS_9
#define CEC_OWN_ADDRESS_10
#define CEC_OWN_ADDRESS_11
#define CEC_OWN_ADDRESS_12
#define CEC_OWN_ADDRESS_13
#define CEC_OWN_ADDRESS_14

               

                #define  HAL_CEC_OWN_ADDR_NONE
#define  HAL_CEC_OWN_ADDR_0
#define  HAL_CEC_OWN_ADDR_1
#define  HAL_CEC_OWN_ADDR_2
#define  HAL_CEC_OWN_ADDR_3
#define  HAL_CEC_OWN_ADDR_4
#define  HAL_CEC_OWN_ADDR_5
#define  HAL_CEC_OWN_ADDR_6
#define  HAL_CEC_OWN_ADDR_7
#define  HAL_CEC_OWN_ADDR_8
#define  HAL_CEC_OWN_ADDR_9
#define  HAL_CEC_OWN_ADDR_10
#define  HAL_CEC_OWN_ADDR_11
#define  HAL_CEC_OWN_ADDR_12
#define  HAL_CEC_OWN_ADDR_13
#define  HAL_CEC_OWN_ADDR_14

               

HAL CEC start frame timing options constants ¶

HAL1	HAL2
#define CEC_SFT_START_ON_TXSOM #define CEC_SFT_START_ON_TX_RX_END	typedef enum { HAL_CEC_SIG_FREETIME_ON_MSG_START, HAL_CEC_SIG_FREETIME_ON_MSG_END } hal_cec_sig_freetime_start_t;

Related concept:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.

HAL CEC error codes constants ¶

HAL1	HAL2
#define HAL_CEC_ERROR_ARBLST #define HAL_CEC_ERROR_BRE #define HAL_CEC_ERROR_INVALID_CALLBACK #define HAL_CEC_ERROR_LBPE #define HAL_CEC_ERROR_NONE #define HAL_CEC_ERROR_RXACKE #define HAL_CEC_ERROR_RXOVR #define HAL_CEC_ERROR_SBPE #define HAL_CEC_ERROR_TXACKE #define HAL_CEC_ERROR_TXERR #define HAL_CEC_ERROR_TXUDR	#define HAL_CEC_ERROR_TX_ARBITRATION_LOST #define HAL_CEC_ERROR_RX_BIT_RISING /* Removed / this kind of logical error is reported by the direct function return (HAL_INVALID_PARAM). */ #define HAL_CEC_ERROR_RX_LONG_BIT_PERIOD #define HAL_CEC_ERROR_NONE #define HAL_CEC_ERROR_RX_MISSING_ACK #define HAL_CEC_ERROR_RX_OVERRUN #define HAL_CEC_ERROR_RX_SHORT_BIT_PERIOD #define HAL_CEC_ERROR_TX_MISSING_ACK #define HAL_CEC_ERROR_TX #define HAL_CEC_ERROR_TX_UNDERRUN

HAL1

HAL2

                #define HAL_CEC_ERROR_ARBLST
#define HAL_CEC_ERROR_BRE
#define HAL_CEC_ERROR_INVALID_CALLBACK
#define HAL_CEC_ERROR_LBPE
#define HAL_CEC_ERROR_NONE
#define HAL_CEC_ERROR_RXACKE
#define HAL_CEC_ERROR_RXOVR
#define HAL_CEC_ERROR_SBPE
#define HAL_CEC_ERROR_TXACKE
#define HAL_CEC_ERROR_TXERR
#define HAL_CEC_ERROR_TXUDR

               

                #define HAL_CEC_ERROR_TX_ARBITRATION_LOST
#define HAL_CEC_ERROR_RX_BIT_RISING
/* Removed / this kind of logical error is reported by the direct function return (HAL_INVALID_PARAM). */
#define HAL_CEC_ERROR_RX_LONG_BIT_PERIOD
#define HAL_CEC_ERROR_NONE
#define HAL_CEC_ERROR_RX_MISSING_ACK
#define HAL_CEC_ERROR_RX_OVERRUN
#define HAL_CEC_ERROR_RX_SHORT_BIT_PERIOD
#define HAL_CEC_ERROR_TX_MISSING_ACK
#define HAL_CEC_ERROR_TX
#define HAL_CEC_ERROR_TX_UNDERRUN

               

Related concept:

Revised and optimized HAL error management

HAL CEC peripheral states constants ¶

In HAL1, the CEC peripheral had two states: gState and RxState. In HAL2, the CEC peripheral is managed by a single state which it is global_state.

HAL1	HAL2
#define HAL_CEC_STATE_RESET #define HAL_CEC_STATE_READY #define HAL_CEC_STATE_BUSY #define HAL_CEC_STATE_BUSY_RX #define HAL_CEC_STATE_BUSY_TX #define HAL_CEC_STATE_BUSY_RX_TX #define HAL_CEC_STATE_ERROR	typedef enum { HAL_CEC_STATE_RESET, HAL_CEC_STATE_INIT, /* New state to indicate that the driver is initialized / HAL_CEC_STATE_IDLE, / Removed, since one of the states HAL_CEC_STATE_RX_ACTIVE or HAL_CEC_STATE_TX_ACTIVE indicates that the driver is busy / HAL_CEC_STATE_RX_LISTEN, / New state to indicate that the driver is in listening mode / HAL_CEC_STATE_RX_ACTIVE, / New state to indicate that the driver is receiving data / HAL_CEC_STATE_TX_ACTIVE / New state to indicate that the driver is transmitting data / / Removed, since one of the states HAL_CEC_STATE_RX_ACTIVE or HAL_CEC_STATE_TX_ACTIVE indicates that the driver is busy / / Removed, when an error occurs, the error is signaled either by HAL_CEC_ErrorCallback() in IT mode or by the return of the function HAL_CEC_PollForReception() in polling mode */ } hal_cec_state_t;

HAL1

HAL2

                #define HAL_CEC_STATE_RESET

#define HAL_CEC_STATE_READY
#define HAL_CEC_STATE_BUSY

#define HAL_CEC_STATE_BUSY_RX
#define HAL_CEC_STATE_BUSY_TX
#define HAL_CEC_STATE_BUSY_RX_TX
#define HAL_CEC_STATE_ERROR

               

                typedef enum
{
  HAL_CEC_STATE_RESET,
  HAL_CEC_STATE_INIT, /* New state to indicate that the driver is initialized */
  HAL_CEC_STATE_IDLE,
  /* Removed, since one of the states HAL_CEC_STATE_RX_ACTIVE or HAL_CEC_STATE_TX_ACTIVE indicates that the driver is busy */
  HAL_CEC_STATE_RX_LISTEN, /* New state to indicate that the driver is in listening mode */
  HAL_CEC_STATE_RX_ACTIVE, /* New state to indicate that the driver is receiving data */
  HAL_CEC_STATE_TX_ACTIVE /* New state to indicate that the driver is transmitting data */
  /* Removed, since one of the states HAL_CEC_STATE_RX_ACTIVE or HAL_CEC_STATE_TX_ACTIVE indicates that the driver is busy */
  /* Removed, when an error occurs, the error is signaled either by HAL_CEC_ErrorCallback() in IT mode or by the return of the function
     HAL_CEC_PollForReception() in polling mode */
} hal_cec_state_t;

               

Note

To check if the driver is busy user can replace HAL_CEC_STATE_BUSY from HAL1 by HAL_CEC_STATE_RX_ACTIVE | HAL_CEC_STATE_TX_ACTIVE in HAL2.

Related concept: